| First Name | Ana |
| Last Name | Férnandez Vilas |
| Adress |
ETSE Telecomunicacion |
| Phone Number | +34 986 813868 |
| Fax | +34 986 812116 |
| avilas@ait.uvigo.es | |
| Home Page | http://www-gris.ait.uvigo.es/~avilas/ |
Research Topics
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Research Topics
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Real-time systems, temporal logic, verification, requirements
A real-time system is one in which the correctness of the system depends not only on the logical results, but also on the time at which results are produced. Formal approach to real-time systems has been tackled extending a large amount of timeless formalisms studied at length. Once major timed problems have been completely or partially resolved, our aim is slightly different. In order to improve software quality, our intend is to merge two different nature solutions: the formalization of the software process; and a process approach which is both iterative and incremental over the whole life cycle. In this way we combine the correctness of formal methods, and the suitability of a life cycle that follows the user requirements and splits complexity.